From 2006-2009, I was awarded three U.S. patents for a solution regarding a circuit crucial in multi-processor integrated circuits. The innovation, which led to these patents, was a revolutionary approach to implementing 1149.1 compliance for ICs that required multiple test access ports (TAPs).
Not only did the solution tackle this complex issue, but also offered a 99% reduction in transistor count when compared with other solutions proposed at the time by industry experts. Consequently, the idea won an award for “Best Implementation” at the 2002 International Test Conference, beating proposals provided by engineers world-wide from companies such as Intel, AMD, Motorola, Phillips, Samsung, Sony, and others.